1. Field of the Invention
The present invention relates to a semiconductor integrated circuit device, and more particularly to a semiconductor integrated circuit device provided with a redundancy circuit.
2. Description of the Prior Art
A semiconductor integrated circuit such as a memory usually incorporates a redundancy circuit by the use of which an effective circuit block is selected. This helps increase the yield of the product. FIG. 4 shows an example of the configuration of a conventional redundancy circuit. The redundancy circuit shown in FIG. 4 is composed of N+1 address program circuits AP0 to APN and an AND circuit 14 that outputs, as a signal REDEN, the AND of the outputs of the individual address program circuits AP0 to APN. Each address program circuit is composed of a MOSFET (metal-oxide semiconductor field-effect transistor), a fuse element, and a judgment circuit.
Here, the configuration of the address program circuit AP0 will be described. An n-channel MOSFET 11 receives a constant voltage Vcc at its source, receives a gate signal NEN at its gate, and has its drain grounded through a fuse element 12. The node between the MOSFET 11 and the fuse element 12 is connected to a judgment circuit 13. The judgment circuit 13 receives an input signal A(0), and outputs an output signal PROG(0) according to the potential at the node between the MOSFET 11 and the fuse element 12. The other address program circuits AP1 to APN are configured in the same manner as the address program circuit AP0, and therefore their configuration will not be discussed separately.
The fuse elements provided in the address program circuits AP0 to APN are typically “polyfuses”, i.e., fuse elements formed of polycrystalline silicon. FIG. 5 is a schematic sectional view of and around a polyfuse formed in a redundancy circuit. The polyfuse 16 is formed above a LOCOS (local oxidation of silicon) 15, and is covered with a protective film (passivation) 17 from above. Moreover, a window 18 is formed to permit the polyfuse 16 to be cut easily with a laser beam. Furthermore, multilayer conductors 19 are formed in the protective film 17.
Which polyfuses 16 to cut is determined according to where a semiconductor integrated circuit has defects, and cutting the relevant polyfuses with a laser beam definitely set the output state of a redundancy circuit as shown in FIG. 4.
However, in semiconductor integrated circuits, in particular in modern high-performance semiconductor integrated circuits, conductors tend to be laid in increasing numbers of layers. This trend has inevitably been increasing the thickness h of the protective film 17 (see FIG. 5), and thus has been making it increasingly difficult to cut the polyfuses 16 with a laser beam unless the windows are made accordingly large. As the number of conductor layers further increases in future, the windows need to be made increasingly small according to design rules, until eventually it becomes impossible to cut the polyfuses with existing laser equipment.
Some redundancy circuits use, as fuse elements, metal fuses instead of polyfuses. In a redundancy circuit so configured, the metal fuses can be formed near the surface layer (top) of the protective film, and therefore, even as the number of conductor layers further increases and the thickness of the protective film increases, it does not become difficult to cut them with a laser beam. However, as compared with polyfuses, metal fuses are liable to cutting failure resulting from refusing or the like after cutting with a laser beam. This necessitates larger cutting windows than for polyfuses.
Incidentally, Japanese Patent Registered No. 2845847 discloses a semiconductor integrated circuit incorporating a custom-made circuit portion that are so configured as to meet a user's requirements. However, this patent makes no mention of redundancy circuits or multilayer conductors.